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At Exponent, Dr. Huang practices failure analysis, patent claim support, due diligence, safety reviews, and prototype designs on a variety of electrical devices and installations. He has performed investigations involving biomedical implantable electronics, medical analytical devices, counterfeit integrated circuits, printed circuit boards, household appliances, portable electronic devices, network and power adapters, vehicle electronics, circuit protection components, electrostatic discharge circuits, and electronic component fires. He has broad experience utilizing relevant standards, regulation and codes including UL, IEEE, NFPA, NEC, ANSI, ASTM, IEC/ISO and IPC to perform inspections, custom tailored laboratory testing and literature searches. During his graduate studies at California Institute of Technology, Dr. Huang’s research focused on the development and characterization of ultra-high density packaging platforms for biomedical systems and bioimplantable MEMS devices with retinal and neural prosthetic applications. Dr. Huang gained comprehensive hands-on clean room fabrication and equipment failure analysis experience, which includes polymer and metal thin film processing, photolithography, etching, thermal processing, SEM, surface profilometry, accelerated life-time testing and fatigue testing. He also has experience with dielectric property characterization, microfluidic lab-on-a-chip devices and microelectronic devices, systems and equipments. Dr. Huang has a variety of teaching experience, including undergraduate and graduate level courses such as Computer Instrument Design, Introduction to Sensors and Actuators, VLSI and ULSI Technology, MEMS Technology and Devices.
Chang J, Huang R, Tai YC. High-density IC chip integration with Parylene pocket. 2011 IEEE NEMS Conference, Kaohsiung, Taiwan, 2011.
Chang J, Huang R, Tai YC. High-density 256-channel chip integration with flexible Parylene pocket. Transducer ’11, Beijing, China, June 5–9, 2011.
Huang R, Tai YC. Flexible parylene-based 3-D coiled cable. 5th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, Xiamen, China, 2010.
Huang R, Tai YC. Parylene to silicon adhesion enhancement. 15th International Conference on Solid-State Sensors, Actuators and Microsystems, Denver, CO, 2009.
Huang R, Tai YC. Parylene-pocket chip integration. 22nd IEEE International Conference on Micro Electro Mechanical Systems, Sorrento, Italy, 2009.
Huang R, Pang C, Tai YC, Emken J, Ustun C, Andersen RA, Burdick JW. Integrated parylene-cabled silicon probes for neural prosthetics. 21st IEEE International Conference on Micro Electro Mechanical Systems, Tucson, AZ, 2008.
Huang R, Pang C, Tai YC, Emken J, Ustun C, Andersen RA. Parylene coated silicon probes for neural prosthesis. 3rd IEEE International Conference on Nano/Micro Engineered and Molecular Systems, Sanya, China, 2008.
Presentations
Huang R, Tai YC. Chip Integration with flexible parylene pocket. 5th International Conference on Microtechnologies in Medicine and Biology, Quebec City, Canada, 2009.
Rizzuto DS, Musallam S, Pang C, Huang R, Tai YC, Andersen RA. The Caltech Brain-Machine interface platform. Society for Neuroscience, Atlanta, Georgia, 2006.
- Research Assistant, Caltech Micromachining Laboratory, California Institute of Technology, 2005–2010
- Intern, Hardware System Lab, Palo Alto Research Center, 2005
- Intern, Corporate Marketing, Applied Materials, 2004
- Member of IEEE
- Tau Beta Pi
- Eta Kappa Nu
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- Ph.D., Electrical Engineering, California Institute of Technology (Caltech), 2011
- M.S., Electrical Engineering, California Institute of Technology (Caltech), 2006
- B.S., Electrical Engineering, Cornell University, 2005
- U.S. Patent: Pocket-enabled Chip Assembly Technology, submitted January 2010 (Huang R, Tai YC).
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