Shukri J. Souri, Ph.D.

Dr. Souri specializes in issues pertaining to electrical and electronic engineering, particularly as they relate to microelectronics systems and semiconductor materials and devices. Dr. Souri has extensive experience with semiconductor devices, systems-level microelectronics for logic, memory, control, and networking applications. His work has involved the design, fabrication, modeling, and measurement of semiconductor devices in systems environments. His experience encompasses semiconductor lasers, power transistors and thin-film transistors (TFTs), PCB and solder-joint reliability analysis for assembly of consumer products and computer systems.

Dr. Souri also specializes in issues pertaining to software engineering including software analysis, architecture, design, programming, and testing. His experience encompasses image processing, optical information processing, and voice recognition software. Prior to joining Exponent, Dr. Souri co-founded two software companies, arcadiaOne, Inc. and Merenga, Inc. He designed and implemented a B2B enterprise content exchange solution offering at arcadiaOne, and the provider of Java web-based financial investment tools at Merenga.

Dr. Souri received his Ph.D. in Electrical Engineering at Stanford University. His Ph.D. research focused on TFT design and fabrication, and on novel interconnect architectures and performance of advanced futuristic 3-D integrated circuits. While at Stanford University, Dr. Souri also taught several courses on IC fabrication, optical fiber communications, TCP/IP networking, and communications protocols and implementation of systems on 3-D chips.

Prior to joining Stanford, Dr. Souri was a member of staff at Raychem’s Corporate Research and Development Laboratories where he developed expertise in semiconductor electroceramic materials and devices for electrical circuit protection, including varistors for over-voltage protection and Positive Temperature Coefficient (PTC) devices for over-current protection.

Fu J, Souri S, Harris J. Temperature and humidity dependent reliability analysis of RGB LED chip. Proceedings, ISTFA 2006: Discretes, Passives, MEMS, and Optoelectronics, pp. 137–141, 2006.

Saraswat K, Kapur P, Souri S. Performance limitations of metal interconnects and possible alternatives. 203rd Meeting of the Electrochemical Society, Paris, France, April 2003.

Saraswat K, Kapur P, Chandra G, Chiang T-Y, Souri S. Scaling induced performance limitations of metal interconnects. IEEE ISSCC Microprocessor Design Workshop, San Francisco, CA, February 2002.

Chiang T, Souri S, Chui C, Saraswat K. Thermal analysis of heterogeneous 3-D ICs with various integration scenarios. IEEE IEDM, December 2001.

Banerjee K, Souri S, Kapur P, Saraswat K. 3-D Heterogeneous ICs: A technology for the next decade and beyond. 5th IEEE Workshop on Signal Propagation on Interconnects, Venice, Italy, May 2001.

Banerjee K, Souri S, Kapur P, Saraswat K. 3-D ICs: A novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration. Proceedings, IEEE: Special Issue on Interconnections, Vol. 89, No. 5, pp. 602–633, May 2001.

Davis J, Venkatesan R, Kaloyeros A, Bylansky M, Souri S, Banerjee K, Saraswat K, Rahman A, Reif R, Meindl J. Integration limits on Gigascale Integration (GSI) in the 21st Century. Proceedings, IEEE: Special Issue of Limits to Semiconductor Technology, Vol. 89, No. 3, pp. 3-05–324, March 2001.

Saraswat K, Banerjee K, Joshi A, Kalvade P, Kapur P, Souri S. 3-D ICs: Motivation, performance analysis and technology. Proceedings, 26th European Solid-State Circuits Conference (ESSCIRC), Stockholm, Sweden, September 19–21, 2000.

Souri S, Banerjee K, Mehrotra A, Saraswat KC. Multiple Si layer ICs: Motivation, performance analysis, and design implications. 37th ACM Design Automation Conference (DAC), pp. 213–220, Los Angeles, CA, June 5–9, 2000.

Saraswat K, Banerjee K, Joshi A, Kalavade P, Souri S, Subramanian V. 3-D ICs with multiple Si Layers: Performance analysis, and technology. 5th International Symposium on Low and High Dielectric Constant Materials: Materials Science, Processing, and Reliability Issues, 197th Meeting of the Electrochemical Society, Toronto, Canada, May 14–19, 2000.

Saraswat K, Souri S, Subramanian V, Joshi A, Wang A. Novel 3-D structures. Proceedings, IEEE International SOI Conference, pp. 54–55, 1999.

Subramanian V, Toita M, Ibrahim N, Souri S, Saraswat K. Low-leakage germanium-seeded laterally-crystallized single-grain 100nm TFTs for vertical integration applications. IEEE Electron Device Letters, Vol. 20, pp. 341–343, 1999.

Souri S, Saraswat K. Interconnect performance modeling for 3D integrated circuits with multiple Si layers. IEEE International Interconnect Technology Conference, pp. 24–26, 1999.

Haskell B, Souri S, Helfand M. Varistor behavior at twin boundaries in ZnO. Journal of the American Ceramic Society, Vol. 82, No. 8, August 1999.

Chu A, Souri S, Melfand M, Kinsman K, Dupon R. Superior electrical performance of Raychem ZnO Varistor through advanced processing. Proceedings, 1st Asian Meeting on Ferroelectricty, Xian, China, October 5–8, 1995.

Book Chapters

Souri S, Chiang T, Kapur P, Banerjee K, Saraswat KC. 3-D ICs deep submicron interconnect performance modeling and analysis. In: Interconnect Technology and Design for Gigascale Integration. Davis J and Meindl J (eds), Kluwer Academic Publishers, October 2003.

Speaker Engagements

Souri S. 3-Dimensional ICs interconnect architecture, technology and performance analysis. Oral Defense, Stanford University, 2003.

Souri S. 3-D ICs with multiple Si Layers: performance analysis and technology. Solid State Technology and Devices Seminar, Microlab, UC Berkeley, 2001.

Souri S. 3D ICs: Performance, analysis and technology. Integrated Circuits and Technology Seminar, Stanford University, 2001.

Souri S. Photoreflectance microscopy of semiconductor materials. Raychem Corporation, CR&D, Menlo Park, CA, 1994.

• Founder, Merenga Inc., 2000–2002
• Co-Founder and Engineering Manager, arcadiaOne, Inc., 1999–2000
• Research Engineer, Circuit Protection Division, Raychem, 1996–1997
• Research Scientist, Corporate Research & Development, Raychem, 1994–1996
  

• Institute of Electrical and Electronic Engineers (member)
• Oxford University Society (life member)
• Oxford Union (member)